Key Points of PCB Impedance Control Design
What is PCB Impedance Control?
Impedance control is one of the most critical technologies in high-speed PCB design. When signal frequencies exceed 100MHz or edge rates are less than 1ns, PCB traces function as transmission lines. The characteristic impedance must match driver and receiver to prevent signal reflections.
Modern high-speed interfaces including USB 3.0, PCIe, DDR4/5, and HDMI all have strict impedance control requirements. Deviation exceeding ±10% can degrade signal quality.
Basic Principles
Characteristic Impedance Definition
Z0 is determined by trace geometry and dielectric properties:
- Trace Width (W): Most direct impedance adjustment parameter
- Dielectric Height (H): Distance from trace to reference plane
- Copper Thickness (T): Trace copper foil thickness
- Dielectric Constant (Dk): Relative permittivity of the material
Common Impedance Structures
| Structure | Typical Impedance | Application |
|---|---|---|
| Single-ended Microstrip | 50Ω | General signals |
| Single-ended Stripline | 50Ω | Inner layer signals |
| Differential Microstrip | 90/100Ω | USB, HDMI |
| Differential Stripline | 90/100Ω | PCIe, SATA |
| Coplanar Waveguide | 50Ω | RF signals |
Calculation Methods
Microstrip Impedance
Z0 ≈ (87/√(εr+1.41)) × ln(5.98H/(0.8W+T))
Stripline Impedance
Stripline between two reference planes provides better shielding and more stable impedance.
Differential Impedance
Zdiff = 2 × Zodd × (1 - k), where k is coupling coefficient.
Key Factors Affecting Impedance
Material Factors
- Dk value and tolerance (±3-5% batch variation)
- Dk vs. frequency (decreases at higher frequencies)
- Resin content affects actual Dk
- Glass weave effect causes Dk non-uniformity
Manufacturing Factors
- Etch factor (trapezoidal cross-section)
- Copper thickness variation
- Lamination thickness control
- Solder mask effect on outer layers
Manufacturing Requirements
- Line width control: ±0.5mil
- Dielectric thickness: ±10% tolerance
- Copper thickness: <10% deviation
- 100% TDR impedance testing
Common Interface Requirements
| Interface | Impedance | Tolerance |
|---|---|---|
| USB 2.0 | 90Ω diff | ±10% |
| USB 3.x | 90Ω diff | ±7% |
| PCIe Gen3-5 | 85Ω diff | ±10% |
| DDR4 | 40Ω SE | ±10% |
| DDR5 | 40Ω SE | ±8% |
| HDMI 2.x | 100Ω diff | ±10% |
| GbE | 100Ω diff | ±10% |
Design Best Practices
- Maintain continuous reference plane beneath impedance traces
- Avoid routing across plane splits
- Keep differential pairs equal length (< 5mil difference)
- Optimize anti-pads at vias for impedance compensation
- Use arc or 45° corners instead of 90° angles
- Verify with 2D field solvers and SI simulation
Conclusion
PCB impedance control requires close coordination between design, materials, and manufacturing. PCB168 achieves ±5% standard tolerance and ±3% for high-precision requirements. Contact our engineering team for impedance control consultation.
Need PCBs for Your Project?
Get an instant quote — prototypes from $2, delivered worldwide.
Get Instant Quote