PCB EMC Design: EMI Shielding and Anti-Interference Layout Practices

Introduction
Electromagnetic compatibility (EMC) is one of the most challenging aspects of electronic product development. Statistics show that over 50% of electronic products fail their first EMC test, and more than 70% of these failures originate from PCB design decisions.
EMC encompasses two aspects:
- EMI (Electromagnetic Interference) — ensuring the product's electromagnetic emissions stay within limits
- EMS (Electromagnetic Susceptibility) — ensuring the product operates normally under external electromagnetic disturbances
Addressing EMC at the PCB design stage is far more effective and economical than adding shields and ferrites after the fact.
Grounding Strategy
The ground plane is the foundation of PCB EMC design. A complete, continuous ground plane provides:
- Low-impedance signal return paths
- Inter-layer electromagnetic shielding
- Reduced power distribution network impedance
- Reference for shielding structures
Ground plane rules:
- At least one complete inner ground plane (no splits)
- Signal layers adjacent to ground plane (closer is better)
- No high-speed signals crossing ground plane splits
- Ensure return path continuity when signals change layers via vias
High-Speed Signal EMC Layout
Clock Signal Handling
Clock signals are the strongest EMI radiation sources on a PCB:
- Keep clock traces short, away from board edges and connectors
- Maintain 3W clearance on both sides of clock traces
- Route clocks adjacent to ground plane, never crossing splits
- Add series damping resistors (22-33Ω) at clock source to reduce edge rate
- Spread-spectrum clocking (SSC) reduces peak radiation by 3-6dB
Differential Signal Design
Differential signals inherently have EMI advantages (differential radiation cancels), but require good symmetry:
- Length matching within 5mil
- Consistent spacing throughout the route
- Same-layer routing, simultaneous layer changes
- No other signals between differential pair traces
Power Supply EMC Design
Switching Regulator Layout
DC-DC converters are major sources of conducted and radiated EMI:
Critical loop minimization:
- Input capacitor close to IC VIN and GND pins
- Minimize the power MOSFET-inductor-output capacitor loop area
- Output capacitor close to load
Decoupling Capacitor Placement
| Capacitor Value | Effective Range | Placement | Quantity |
|---|---|---|---|
| 10-100μF | DC-1MHz | Power entry | 1-2 |
| 1-10μF | 100kHz-10MHz | Near IC power pins | 1 per pin |
| 100nF | 1MHz-100MHz | Near IC power pins | 1 per pin |
| 10nF | 10MHz-500MHz | Near high-speed IC | Critical pins |
Connector and Interface EMC
Connectors are the primary pathway for EMI entering and leaving the PCB:
- Group all I/O connectors on one side of the PCB
- Connect connector ground pins directly to ground plane with multiple vias
- Place interface filter components immediately adjacent to connectors
- Use common-mode chokes for high-speed interfaces (USB, HDMI, Ethernet)
- Dense ground via stitching around connector areas
Board-Level Shielding
When PCB layout optimization alone cannot meet EMC requirements, add shielding cans:
- Continuous ground pad ring around shield perimeter (spacing < λ/20)
- Independent decoupling inside the shield
- Filter all signals crossing the shield boundary
- Shield height = tallest component + 0.5mm clearance
Conclusion
PCB EMC design is a systematic discipline that must be addressed from the earliest design stages. The core principles are: minimize loops, maintain complete ground planes, isolate noise sources from sensitive circuits, filter at all boundaries, and use shielding as a last resort.
PCB168 has extensive experience manufacturing EMC-sensitive PCBs, supporting precision impedance control (±5%), multi-layer shielding structures, and dense ground via arrays. Our engineering team provides EMC-related DFM recommendations to help products pass certification testing on the first attempt.
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