Thick Copper Multilayer PCB: Layer Count and Copper Weight Limits
Why the three ranges cannot be read as a row
Every ounce of copper on every layer occupies vertical space, and so does every sheet of dielectric between those layers. Board thickness is the sum, not a free variable you set alongside the others.
That gives you a simple mental model, and it is worth stating without inventing numbers we have not published:
- Copper weight is consumed per layer, not per board. A 6oz spec on a 4-layer board is four copper layers of 6oz. The same spec on a 12-layer board is twelve. The vertical stack grows accordingly.
- Dielectric between heavy copper layers is not free either. Resin has to fill the space beside and above thick conductors during lamination. Heavier copper generally needs more resin available to fill cleanly, which pushes dielectric thickness up rather than down.
- Board thickness is the hard ceiling. 6.0mm is the published maximum. Once copper plus dielectric reaches it, the remaining axes stop being negotiable regardless of how much you want them.
So the practical constraint is: copper weight × layer count is bounded by board thickness, and any one of the three can be the binding limit. Push all three toward their published maximums simultaneously and something has to give.
This is also why "can you do 20oz?" and "can you do 20oz on 16 layers?" are not the same question, and why a supplier that answers yes to both without asking anything else is not being helpful. For context on how our multilayer stackups are built in the general case, the multi-layer PCB stackup guide covers the layer-by-layer logic without the heavy copper complication.
Copper weight eats board thickness: what actually binds first
There is no single crossover point to give you, because it depends on your dielectric requirements, your inner-versus-outer copper distribution and whether your heavy copper is on every layer or only some. What *is* predictable is the order in which things bind.
At low layer counts (1–4), copper weight is usually the free axis. This is where the top of the 3oz–20oz range genuinely lives. A 2-layer or 4-layer board has few enough copper layers that even very heavy copper fits comfortably inside 0.8mm–6.0mm. Busbar-style power boards, welding equipment and high-current inverter stages typically sit here, and that is not a coincidence — it is the region where the geometry cooperates.
In the middle (6–10 layers), the two axes start trading against each other. You can still specify heavy copper, but you are now choosing between "heavier copper" and "more layers" rather than having both. This is the region where telling us your actual electrical requirement matters more than telling us a copper weight, because the requirement can often be met by either a heavier plane or a wider one.
At high layer counts (12–16), layer count is usually what is spending your thickness budget. The published 16-layer maximum for heavy copper is real, but it does not come with the top of the copper range attached. Expect the copper weight available at 16 layers to be meaningfully lower than what is available at 4 layers. Where exactly it lands is a stackup question and needs engineering review confirmation.
Note also that the 1–16 layer range on the heavy copper page is narrower than the 4–40 layers published on our multi-layer PCB page. That gap is the point: standard-copper multilayer goes much further precisely because thin copper costs almost nothing in vertical space. If your design needs more than 16 layers, the conversation has to move to whether heavy copper is required on all layers or only on the power layers.
The 6mil minimum line width is the constraint people forget
Copper weight has a second cost that has nothing to do with thickness, and it catches designers who have just come from a dense digital board.
Heavy copper etches differently from thin copper. Thicker conductors need more etch time, and more etch time means more sideways attack on the trace walls, so the achievable minimum feature size goes up. That is why the heavy copper page publishes a 6mil minimum line width while the multilayer page publishes 3mil/3mil and the HDI page goes down to 2mil/2mil. Same factory, opposite direction.
Two consequences for your RFQ:
- You cannot route a dense signal fabric on a heavy copper layer. If your board has both a high-current power section and a fine-pitch digital section, say so explicitly. Mixed requirements are normal, but they need to be described per layer or per region, not averaged into one line-width number.
- Controlled impedance gets harder, not just looser. The heavy copper page publishes impedance control at ±10%, versus ±8% on the standard multilayer page. Beyond the tolerance figure, a 6mil floor limits which impedance targets are geometrically reachable at all on that layer. If you need impedance-controlled routing, plan for it to live on standard-copper layers. Our impedance control article covers the design side; the point here is only that heavy copper narrows your options.
Mixed copper weights: legal, common, and frequently under-specified
You do not have to build every layer at the same copper weight, and for most thick copper multilayer boards you should not. The usual pattern is heavy copper on the power planes and standard copper on the signal layers. This is the single most effective way to keep a high-layer-count board inside the thickness budget while still getting the current capacity you need.
The problem is how mixed stackups get communicated. "6oz, 12 layers" is ambiguous — it could mean twelve 6oz layers, which may not be buildable, or two 6oz planes among ten standard layers, which probably is. Those are very different boards and very different prices, and a supplier guessing between them will either quote the expensive interpretation or quietly assume the cheap one.
Write it per layer instead. A single line per layer is enough:
```
L1 1oz signal
L2 1oz ground
L3 6oz +48V plane
L4 6oz return plane
...
L12 1oz signal
```
You do not need a finished stackup drawing to do this. A layer list with copper weight and function against each layer is enough to make the board quotable, and it is the input that most often turns a stalled enquiry into a same-pass quote. Note that symmetry matters during lamination, so if your heavy copper layers are unbalanced around the centreline, expect engineering review to comment on it.
Four checks before you send the RFQ
Run these yourself before submitting. Each one you answer is a question we do not have to send back to you.
1. Does your copper weight apply to every layer or only some? Answer per layer, using the list format above. If genuinely every layer needs heavy copper, say that explicitly — it is a legitimate requirement and it changes the feasibility answer.
2. Is your board thickness a target, a maximum, or a hard mechanical constraint? These are three different inputs. A target can flex. A hard constraint driven by a connector, card guide or enclosure slot cannot, and if it is hard then it, not copper weight, is what determines your layer count. Give the tolerance too if the constraint is mechanical.
3. What is the actual electrical requirement behind the copper weight? Current, allowed temperature rise, and whether the conductor is internal or external. Copper weight is a *solution* someone already chose; the requirement is what lets engineering confirm the choice or propose a wider-and-thinner alternative that fits your thickness budget. We deliberately publish no current-capacity table here — sizing depends on your temperature rise allowance, ambient, layer position and copper distribution, and any number quoted without those is decoration.
4. Do any regions need features below 6mil? If yes, identify which layers and which areas. This determines whether you need a mixed-copper stackup rather than a uniform heavy copper build.
Answer those four and you have a quotable package. Add your Gerbers and the quote form has everything it needs.
When it has to go to feasibility review first
Some combinations are not answerable from a spec table by anyone, including us. Send these as a feasibility question rather than an RFQ, and expect a conversation instead of a number:
- Heavy copper on all layers above roughly 10 layers. This is where thickness arithmetic usually decides the answer, and the decision needs a real stackup.
- Any combination sitting near two maximums at once. Near-16-layer plus near-20oz, or maximum copper inside a hard thin-board constraint. Being near one edge is routine; being near two is a review.
- Copper weight above 10oz combined with any controlled-impedance requirement. The 6mil floor and the ±10% tolerance interact with the geometry available on that layer.
- Hard board thickness constraint plus heavy copper plus a fixed layer count. Three fixed inputs and no free variable. Something must be allowed to move, and it is faster to decide which one before quoting than after.
- Strongly asymmetric heavy copper distribution. Lamination behaviour and warpage risk depend on how copper is balanced around the centreline. Reviewable, just not from a table.
None of these is a refusal. The distinction is between questions a spec table can answer and questions a stackup can answer. Sending the second kind as an RFQ is what produces the week of silence. If you are unsure which bucket you are in, our capabilities page is the general overview, and an engineering enquiry with your layer list will get you a straight answer faster than a quote request will.
What to take away
The three published ranges on the heavy copper page are boundaries on three separate axes, and board thickness is the shared budget they all draw from. Read them one axis at a time. Specify copper weight per layer rather than per board. Keep fine features and impedance-controlled routing on standard-copper layers, because 6mil is a floor and not a preference. And when your requirement sits near two limits simultaneously, ask for feasibility rather than price — it is the same engineers either way, and it is several days faster.
FAQ
Can PCB168 build a 16-layer 20oz thick copper PCB?
16 layers and 20oz are both published capabilities, but not in the same board. Both figures are axis maximums, and a 16-layer all-20oz stack would not fit the 6.0mm board thickness limit. In practice heavy copper above about 10 layers is built as a mixed stackup with heavy copper on the power planes only. Send your layer list and current requirement for engineering review confirmation rather than assuming either extreme.
Why is the minimum line width 6mil for heavy copper but 3mil on the multilayer page?
Thicker copper takes longer to etch, and longer etching attacks the trace sidewalls as well as the surface, so the smallest reliably reproducible feature gets larger. The 6mil figure on the heavy copper page and the 3mil/3mil on the multilayer page reflect that difference. It is a process consequence of copper thickness, not a different factory.
Do I have to use the same copper weight on every layer?
No, and usually you should not. Mixed stackups with heavy copper on power planes and standard copper on signal layers are the normal way to build a thick copper multilayer board. It is also the most effective way to stay inside the 6.0mm thickness limit at higher layer counts. Specify the copper weight against each layer so there is no ambiguity about which interpretation you meant.
How much current can a 6oz trace carry?
We deliberately do not publish a single figure, because the answer depends on your allowed temperature rise, ambient temperature, trace width, whether the conductor is on an internal or external layer, and how nearby copper spreads heat. Give us current, allowed rise and layer position, and engineering will confirm a conductor geometry. A current rating quoted without those conditions cannot be held to.
Can I get controlled impedance on a thick copper multilayer board?
The heavy copper page publishes impedance control at ±10%, so yes within that tolerance, but the 6mil minimum line width limits which impedance targets are geometrically achievable on a heavy copper layer. If impedance-controlled routing is important to your design, plan it onto standard-copper layers in a mixed stackup and flag the requirement in your RFQ so the stackup is built around it from the start.
What is the fastest way to find out if my combination is buildable?
Send a layer list with copper weight and function per layer, your board thickness with tolerance and whether it is a hard constraint, and the current and temperature-rise requirement behind the copper weight. That is enough for a feasibility answer. Without the per-layer breakdown, almost any thick copper multilayer enquiry above a few layers needs a clarification round before anyone can respond.
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