HDI Fine Line Etching: Who Owns Trace Width Tolerance | PCB168

Start with the conclusion: on a fine-line HDI board, the conductor width written on your artwork and the conductor width that arrives on the finished board are two different numbers, and the gap between them is not a defect. It is the planned result of etch compensation — the fabricator widens the copper features in the phototool so that, after the etchant has eaten away both downward and sideways, what is left measures what the circuit actually needs.

That mechanism is standard practice and nobody disputes it. The problem is a quieter one: etch compensation lives inside the fabricator's process, while the trace width lives inside your design intent. Between those two sits a question that almost no RFQ answers, because almost no RFQ asks it:

> Is the width on my artwork the value the finished board must achieve, or is it the starting value the fabricator is entitled to adjust?

Both readings are defensible. Both are in daily use across the industry. And at quotation time they look identical — the same Gerber, the same layer count, the same price. The divergence only becomes visible the day the boards land on your dock and someone measures a trace. At that moment the two readings produce opposite verdicts on the same board.

The disagreement your quotation cannot show you

Picture two fabricators quoting the same fine-line HDI design. Both come back with a number. Both say they can hold your line width.

The first one read your artwork as a finished-value specification: whatever compensation it applies internally, it owns the obligation that the etched conductor measures what you drew. If its compensation model is slightly off, the deviation is its non-conformance.

The second one read your artwork as a pre-compensation input: it applies its house compensation to your geometry, builds the phototool, and treats the resulting etched width as correct by definition, because it came out of a qualified process running within its own parameters. If you then measure a deviation from your drawn value, its answer is that the process was in control.

Neither is acting in bad faith. They answered different questions, because you asked a question that permits both answers. And nothing in the quotation reveals which one you are buying — compensation strategy is not a line item.

This is why fine-line work goes wrong in a way that coarse work does not. On a wide conductor, compensation differences between fabricators are a small fraction of the feature, lost inside any reasonable tolerance. As features shrink, the same absolute compensation uncertainty becomes a large fraction of the width you care about. Fine-line HDI does not introduce a new failure mode; it removes the margin that used to hide an old one.

Why the fabricator's parameter moves your number

Etching is subtractive and it is not directional. The etchant attacks the top of the copper and the sidewalls at the same time, so a conductor loses width while it loses height. How much width it loses before the copper is clear depends on a set of things that are all on the fabricator's side of the fence:

• How thick the copper is at that layer — thicker foil needs longer attack, and longer attack removes more sidewall.
• Which layers carry plated copper versus foil copper — build-up layers and core layers do not etch identically, and an HDI stackup routinely contains both.
• The chemistry, temperature, and transport speed of its etch line — the process window it has qualified.
• Where your feature sits in the panel and how dense its surroundings are — local loading changes local attack rate.
• The compensation model it has built from its own history — the number it adds back into the phototool.

Every item on that list is a process variable the fabricator controls, measures, and does not publish. You cannot compute your delivered width from your design file, and you should stop trying. What you can do is decide — in writing, before tooling — which of the two numbers is contractually binding.

That is the entire content of this problem. Not "how do I get tighter lines," but "whose number wins when the two numbers disagree."

Two acceptance bases, two opposite verdicts

Write the two readings out side by side and the consequences separate cleanly.

Basis A — acceptance against the drawn (artwork) value. The finished conductor must measure the width on your data, within a stated tolerance. Compensation is the fabricator's problem and its risk. If the etched result drifts outside the band, the lot is non-conforming regardless of whether the process was in statistical control.

• The design intent you captured is the thing that gets delivered.
• Review and comparison across suppliers is straightforward: everyone is held to your number.
• The fabricator absorbs model uncertainty, and will price that absorption. Expect it to be reflected somewhere, and expect it to ask for a wider band than you first proposed.
• A fabricator that cannot hold your band has to say so before tooling, which is exactly the conversation you want to force.

Basis B — acceptance against the fabricator's post-compensation value. The artwork is an input. The fabricator declares the compensated geometry it will actually image, and the finished board is judged against that declared value.

• Nothing is hidden, *provided the declaration happens and you keep it.*
• It can genuinely be the better choice when the electrical requirement is not width itself — when what you actually need is an impedance, or a current path, and width is only one lever.
• But if the declaration never arrives, Basis B degrades into "whatever the process produced is correct." There is no longer any number to fail against.
• Second-source comparison becomes meaningless, because each supplier is being judged against its own declaration rather than against a common target.

The failure case is not choosing one or the other. It is leaving it unchosen. An unstated basis defaults, in practice, to whichever reading favours the party holding the boards — and the party holding the boards is never you.

Where the measurement is taken is part of the specification

Suppose you have settled the basis. You can still end up in a dispute where both parties measure honestly and get different answers, because a trace does not have one width.

Four things have to be named, or the number is not reproducible:

Which layer. An HDI stackup does not etch uniformly. Outer layers carry plated copper and etch differently from inner-layer foil; sequentially laminated build-up layers have their own history. "The line width" without a layer reference is not a measurable quantity. If several layers matter, say so for each.

Where along the conductor. Width is not constant down a trace. It changes near pads and teardrops, where it enters a via land, where neighbours crowd it, and where it crosses a density transition in the panel. A measurement at a clean isolated mid-span and a measurement one feature away from a land are both truthful and will not match. Name the kind of location, not just the layer.

At what height in the cross-section. Etching leaves a trapezoidal conductor, not a rectangle. Top width, bottom width, and mid-height width are three different numbers on the same trace. Agreeing on a tolerance while leaving the reference height unstated means agreeing on nothing.

How many samples, and across what population. One reading per panel, several per panel, per lot, per layer — and whether the verdict is per-reading or per-average. A specification that permits a single convenient reading is not a specification.

Industry acceptance documents — IPC-6012 for board performance and IPC-A-600 for visual acceptance — are built around the idea that conductor attributes are judged under a named method against a named class. Invoking a standard without naming the layer, location, cross-section reference, and sampling is a common and expensive half-measure, because it creates the appearance of rigour while leaving every operative detail open. Reference the standard for the framework; still state your own four items explicitly.

When width and impedance are both specified, you must say which yields

This is the trap that catches experienced buyers, and it is specific to fine-line HDI.

Controlled impedance is a function of conductor width, conductor thickness, dielectric separation, and the dielectric material around it. Give a fabricator an impedance target and it will solve for the combination it can hit — and the lever it reaches for first is almost always width, because width is the cheapest variable to move in the phototool.

So if your RFQ carries both a trace width with a tolerance and an impedance target with a tolerance, you have handed over a specification that may be internally unsatisfiable. The fabricator can hold your width, or hold your impedance, but not necessarily both. It will then do one of three things:

1. Hold impedance and quietly move width — common, because impedance is usually tested and reported while width usually is not.
2. Hold width and miss impedance — and you discover it in electrical test, or later.
3. Come back and ask. Which is what you want, and which only happens if someone noticed the conflict.

The fabricator cannot resolve this for you, because the answer depends on why you specified the width. If the width was a means of achieving impedance, it should yield — tell them impedance governs and width is advisory. If the width exists for a reason impedance does not capture — current-carrying, a thermal path, a connector or substrate interface, a mechanical constraint — then it must hold, and the impedance solution has to be found in the other variables, which costs more and may change the stackup.

Only you know which it is. Put it in the RFQ. One sentence: state which attribute governs when the two cannot both be met. Our treatment of who owns the impedance target itself is a separate discussion — see the controlled-impedance ownership piece linked below; here the only point is the priority order between two requirements you have already written down.

What to actually put in the RFQ

Four declarations. They are short, they fit in the notes of a fabrication drawing, and they are worth more than another page of general requirements:

1. Acceptance basis. State whether finished conductor width is judged against the drawn artwork value or against the fabricator's declared post-compensation value. If the latter, require the declared value to be returned to you in writing before tooling, and treat it as part of the frozen data set.

2. Tolerance and the layers it applies to. State the band and name the layers. Where layers have different criticality, say so rather than applying one band everywhere — a uniform band across a mixed stackup is either too loose where it matters or needlessly expensive where it does not.

3. Measurement method. Name the location type along the conductor, the cross-section reference height, the sampling plan, and whether the verdict is per-reading or per-average. State whether a report is required with shipment or available on request.

4. Priority between width and impedance. One sentence naming which governs. If impedance governs, say width is advisory. If width governs, say the impedance solution must come from the other stackup variables and must be confirmed before tooling.

Add a fifth if you expect to reorder: require notification if the compensation model changes between builds. More on why in the next section.

What you are left holding without these declarations

Skip the four declarations and you do not get a disaster. You get something harder to deal with: a board that is arguably correct.

• Incoming inspection has no verdict available. You can measure, you can see a deviation, and you cannot conclude anything, because the document never said which value was binding. Measurement without an agreed basis produces data, not decisions.
• Supplier comparison collapses. Two fabricators, two compensation models, two internally-consistent results. You cannot tell which one is better at fine lines, only that they are different. The comparison you thought you were running was never set up.
• Reorders drift. This is the one that surprises people most. A compensation model is maintained — it gets refined as the fabricator accumulates history, and it changes when foil sourcing, chemistry, or line configuration changes. Same Gerber, same supplier, same part number, different delivered width — and from the fabricator's side nothing happened worth telling you about, because it never agreed that the drawn value was binding. Boards that assembled and performed fine on the first build can behave differently on the third, with no change on your side to point at. Whether tooling and process are reused across reorders is itself something to pin down — see HDI tooling and NRE charge ownership on reorders and repeat-order change control terms for the commercial side of that.
• Failure attribution has nowhere to land. When something fails electrically and width is a candidate cause, the investigation needs a baseline to compare against. Without a binding value and a method, there is no baseline, and the discussion becomes a negotiation instead of an analysis.

None of this requires anyone to behave badly. It only requires the document to be silent — and silence is the default state of most RFQs on this exact point.

Where this sits in the rest of the HDI specification

Trace width is one attribute among several that need an owner named before tooling. The ones that most often travel with it:

• Build class and structure — how many sequential lamination cycles and what via structure, which bounds what any layer can hold. See HDI build class specification and decision ownership.
• Layer-to-layer registration and annular ring — the positional counterpart to this dimensional question. See HDI layer registration and annular ring tolerance.
• Controlled impedance ownership — who sets the target and who owns the solution. See HDI controlled impedance target ownership.
• Aspect ratio and board thickness — the drilling and thickness limits that constrain the same stackup. See HDI aspect ratio, thin cores and board thickness limits.
• Surface finish for fine-pitch assembly — what happens to these features downstream. See HDI surface finish and fine-pitch assembly declaration.
• Supplier capability tiering — whether a given fabricator belongs in a fine-line conversation at all. See HDI manufacturing capability tiers buyer guide.

For the capability context behind these inputs, see our HDI PCB page and the broader manufacturing capabilities overview. When your declarations are ready, send them with the data package through RFQ and quotation.

One closing point. Everything above costs you four sentences and one decision. It costs nothing in unit price and nothing in lead time, and it has to happen before tooling or it does not happen at all — once the phototool exists, the compensation decision has already been made by someone, and the only question left is whether it was made by the party who knew why the width was there.

FAQ

Is etch compensation something I should be trying to eliminate?

No. It is how subtractive etching produces a target geometry, and a fabricator working without it would deliver conductors narrower than intended. The goal is not to remove compensation but to establish whose number is binding after it has been applied.

Can I just ask for the fabricator's compensation values up front?

You can ask, and some will tell you, particularly once a relationship exists. Many treat the model as process know-how and will not publish it. This is why the practical lever is the acceptance basis rather than the parameter itself: declaring that the finished value is binding gets you the outcome you need without requiring anyone to open their process. If you do receive declared compensated values, keep them with the frozen data set and reference them in the acceptance language.

My design has an impedance requirement, not a width requirement. Does any of this apply?

Yes, and the answer is simpler for you: state that impedance governs and that drawn width is advisory. Without that sentence, a fabricator holding both numbers may hold the wrong one, and the one it holds will be whichever your document appeared to emphasise. One sentence removes the ambiguity.

Does invoking IPC-6012 or IPC-A-600 cover the acceptance basis for me?

Not by itself. Those documents give you a framework and a class structure for judging conductor attributes under a named method. They do not decide, on your behalf, whether the binding value is your drawn width or the fabricator's compensated width, and they do not choose your layer, location, cross-section reference, or sampling plan. Reference the standard for the framework; state those items yourself.

Why would a delivered width change on a reorder if nothing on my side changed?

Because the compensation model is not static. It is refined as the fabricator accumulates process history, and it shifts when foil sourcing, etch chemistry, or line configuration changes. If your document never made the drawn value binding, a model update is an internal process improvement that generates no notification. Making the finished value binding, and requiring notification of compensation changes between builds, is what converts that silent drift into a conversation.

At incoming inspection I measured a deviation from my artwork. Is the lot non-conforming?

It depends entirely on which basis the purchase order established, which is the point of this article. Under acceptance against the drawn value, a deviation outside the stated band is non-conformance. Under acceptance against a declared compensated value, you need that declared value to judge against, and the deviation from artwork may be expected. If the document named neither, you have a measurement and no verdict — and that position is weak, because the boards are already built.

Is there a minimum trace width below which this stops being manageable?

We do not publish a threshold here, and you should be cautious of anyone who gives you a universal one: the manageable limit is a property of a specific fabricator's qualified process, copper thickness, and layer type, not of fine-line work in general. The right move is to send your actual geometry and stackup for review before committing to a design, and to get the acceptance basis and tolerance confirmed as part of that review rather than after it.

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