Solder Mask Over Heavy Copper: The RFQ Line Buyers Forget to Write

Start here: the product page has no solder mask row

Worth being blunt about, because it is the root of the omission. The specification table on the heavy copper page publishes these rows:

There is no solder mask row. Not an oversight to be annoyed about — a capability table lists what varies commercially, and mask colour does not belong there. But it means a buyer who builds the RFQ by walking down the product page will write six fields and stop, having never been prompted for the seventh. The capabilities page does not prompt for it either: its finish row expands to HASL, ENIG, OSP and immersion tin or silver, and mask again does not appear.

So the mask declaration is the field with no template behind it. On thin copper that costs nothing. On heavy copper it is the field that decides whether the high-current regions arrive usable.

What changes when the conductor is this tall

Three things, and they are worth separating because each one generates a different RFQ line.

The coating has to cover a step, not a surface. A liquid photoimageable mask is applied, exposed, developed and cured. Applied over a tall conductor it does not deposit as an even skin of one thickness — material behaves differently on a flat field, on a sloped wall and on a top edge. The result is a coating whose thickness varies by location on the same board. That is inherent to coating over topography, not a supplier-specific weakness.

The thinnest place is the place nobody specified. Because coverage varies with topography, the question *is the conductor covered* has more than one answer depending on which face you are asking about. If the RFQ says only "solder mask both sides", it has declared the existence of the coating and nothing about the geometry it has to cover. Both parties then default to their own assumption, and the assumptions are not the same.

Bare copper areas are often deliberate on heavy copper. Heavy copper boards frequently want copper exposed on purpose: busbar-style conductors that will be reinforced with solder or bonded to a bar, contact regions, areas that a mechanical part has to sit against, thermal interfaces. On a signal board bare copper is usually an escape. Here it can be a requirement. Which means the mask declaration is not *cover everything* — it is *cover these, leave these, and here is how we tell them apart*.

Declare the mask as four region classes, not one colour

The workable form of the declaration is a zone map, not a sentence. Four classes cover almost every heavy copper board, and each one needs to be identifiable from the files you are sending — not from a verbal note in the email thread.

1. Must be covered. Conductors that carry voltage and must stay isolated from anything that could bridge them: adjacent high-current traces, regions under a part that will be mounted mechanically, anything near a board edge or a mounting point that a chassis could touch. State that these are coverage-critical, and state that both the top face and the sidewall are included.

2. Intentionally bare. Copper that must arrive with no coating on it at all. State the purpose in one clause — solder reinforcement, bar bonding, contact surface, thermal interface — because the purpose determines what the exposed copper needs to survive before assembly, and therefore how it interacts with the finish line further down.

3. Bare with a defined boundary. The case most often lost: a region where copper must be exposed, but where the edge of the exposure matters because a part, a bar or a fastener lands relative to it. Here the RFQ has to say that the boundary position is a dimensioned requirement rather than a cosmetic one, and say which drawing carries the dimension.

4. No mask permitted. Areas where mask presence would be a defect even though covering them would look harmless — under a mechanical interface, inside a clearance, anywhere a coating would add unplanned height. On heavy copper this class is real, because the parts sitting on these boards are often bolted, bonded or bar-fed rather than reflowed.

Two practical notes on getting this into a quotable form. First, the classes need to live in the file set, as mask-layer geometry plus a fabrication drawing note, not as prose in the RFQ body — prose does not survive the handoff from the sales thread to the CAM engineer. Second, if a region is class 3 or 4, say so explicitly rather than assuming the absence of mask geometry communicates intent. Absent geometry is ambiguous: it can mean *leave bare on purpose* or *we forgot*, and CAM cannot tell which from the file alone.

The sidewall is its own field

This is the part that most often has no owner.

Say the RFQ states that a conductor must be covered. On a thin board that statement is complete, because there is effectively one face. On a 6oz conductor there are three: the top, and two walls running down to the base. A coating can be present on the top face and thinner where the wall meets the base, and the board would still satisfy a requirement written as "conductor covered".

Whether that matters depends entirely on what the board does, which is why the buyer has to answer it rather than the supplier guessing. It matters when two heavy conductors run at meaningful potential difference and the gap between them is the isolation, because the narrowest coverage sits exactly in that gap. It matters when the assembly process pushes something conductive into that region. It matters when the finished board runs in an environment where contamination can settle in a channel — and if that environment is part of your requirement, our industrial operating environment inputs covers how to state the environment itself.

The line to add is short, and it is a requirement statement rather than a number:

> For conductors in class 1, continuous coverage is required over the top face and both sidewalls down to the base, and is a coverage requirement rather than a cosmetic one. Identify the regions where this applies.

Note what that line does not do: it does not name a thickness in µm. A buyer inventing a sidewall thickness figure is specifying a process rather than a requirement, and will get either a refusal or a silent reinterpretation. State the function that must hold and identify the regions; let the supplier answer with what the process can hold there. PCB168 does not publish a mask thickness or sidewall coverage figure, and nothing in this article should be read as one.

The related trap is the narrow web of mask between two close conductors. Where the gap is tight, the mask bridging it is a thin strip of coating standing between two tall walls, and there is a lower limit below which that strip cannot be relied on. That limit interacts directly with the spacing you asked for — which is why the mask discussion and the spacing discussion belong in the same conversation rather than two emails a week apart. The conductor-geometry side of that pair, minimum width and spacing at a given copper weight, is a separate question from coverage; this article stays on the coating, and the purchase specification and acceptance guide covers where spacing sits in the wider spec freeze.

Mask zoning and surface finish constrain each other

The sequencing point that makes this urgent at RFQ stage rather than at DFM stage.

Surface finish is applied to the copper that the mask leaves exposed. So the moment you declare class 2, 3 or 4 regions, you have changed what the finish line means. It is no longer a statement about pads. It is a statement about every bare copper area on the board, including the large ones you exposed on purpose.

Three consequences follow, all of which are decisions rather than calculations:

The finish now has to be acceptable on a large exposed area, not just on pads. The three finishes published for heavy copper — HASL, ENIG, OSP — are not interchangeable in that role. They differ in what surface they leave, how flat it is, how it behaves under a mechanical or bonded interface, and how long it holds up before assembly. PCB168's general comparison of the options is in PCB surface finish comparison; what this article adds is that on heavy copper you are choosing for exposed regions and mechanical interfaces, not only for solderable pads.

Bare-by-design copper has a shelf life problem that bare-by-accident copper does not. An intentionally exposed region is exposed from fabrication through transit through storage until whatever happens to it at assembly. Whether it needs a protective finish or must arrive genuinely bare metal is a requirement you own, and it needs to be in the same declaration as the zone map so the two cannot be frozen separately.

If a region is class 4 — no coating permitted — say whether that extends to the finish. "No solder mask here" and "no surface finish here" are two statements. A region can legitimately need one and not the other. Leaving it at one statement leaves the second to interpretation.

The practical instruction: freeze the zone map and the finish line in the same revision, and make sure the quote references both. Splitting them across revisions is how a board ends up with a correct mask map and a finish chosen for a board that no longer exists. Our fabrication specification sheet article covers how to keep a spec sheet binding on the quote rather than advisory.

Multilayer and mixed copper weights add one more question

If the board is multilayer heavy copper — and the product page publishes 1 to 16 layers, while capabilities publishes up to 40 for standard work — then the mask declaration applies to the two outer layers only. That sounds like a simplification, and it is, but it introduces an ambiguity worth closing.

When a board carries different copper weights on different layers, the outer layer copper weight is the one the mask has to climb. A board described in the RFQ as "6oz" might be 6oz on internal power layers and something lighter outside, or the reverse. If the mask requirement is written against "the board's copper weight", it is written against a number that may not describe the surface being coated. Write the mask requirement against the outer layer weight explicitly. The declaration of per-layer weights themselves is covered in mixed weight stackup declaration, and the separate base-versus-finished copper question — which changes how tall the outer conductor actually ends up — in finished copper thickness versus base copper.

The five lines to add to a heavy copper RFQ

Compressed into a form you can paste into a specification sheet. None of these asks the supplier for a value you should be inventing; each one states a requirement or identifies a region.

1. Zone map reference. Name the file and layer that carries mask geometry, and the drawing that carries mask notes. State that bare regions are intentional where shown, so absent geometry is not read as an omission.
2. Must-cover regions. Identify the conductors where coverage is functional, not cosmetic, and state the reason in one clause (isolation, mechanical interface, clearance).
3. Sidewall requirement. State that class 1 conductors require continuous coverage over top face and both sidewalls to the base, and identify where this applies. Do not specify a thickness.
4. Bare-region purpose and boundary. For each intentionally bare region, state the purpose and whether its boundary is dimensioned. Say whether the exposure is to be finished or genuinely bare metal.
5. Outer-layer copper weight for the mask. State the outer layer copper weight explicitly as the basis for the mask requirement, separately from any internal layer weights.

A sixth line if the board is going to repeat: state that the zone map revision is part of the frozen configuration, so a later change to bare regions is a change requiring approval rather than a file swap. The acceptance and change-control side of that is in heavy copper purchase specification and acceptance — that article covers the eight-step freeze-and-accept loop; this one only supplies the mask field it should be carrying.

Send the zone map with the quote request rather than after it. Mask zoning is cheap to answer before tooling and expensive to answer after, and it is the field most likely to be missing from an otherwise complete heavy copper package.

FAQ

Is "green solder mask, both sides" enough on a heavy copper board?

It states the colour and that a coating exists on both sides. It does not state which regions must be covered, which must be bare, or what is required of the conductor sidewall. On a 1oz board those omissions are harmless because there is effectively one surface. On a 3oz or heavier board the conductor is tall enough that coverage varies by location, so the omitted information is exactly the information that matters.

Why do I need to specify the sidewall separately?

Because a tall conductor has three faces that a coating has to cover, and a requirement written as "covered" can be satisfied by the top face alone. Where the gap between two conductors is your isolation, the coverage in that gap is the thing you are relying on, so it needs to be stated as a requirement rather than inferred.

Should I state a solder mask thickness in µm?

Not unless you have a specific requirement that demands it. Inventing a thickness specifies a process instead of a function, and a buyer-invented figure tends to be either refused or quietly reinterpreted. State what has to hold — continuous coverage on these conductors, these faces — and let the supplier answer with what the process supports there.

Does exposing copper on purpose change my surface finish choice?

Yes. Finish is applied to whatever the mask leaves open, so declaring bare regions turns the finish line into a statement about large exposed areas and mechanical interfaces, not just about solderable pads. The three finishes published for heavy copper behave differently in that role, and the choice should be made after the zone map exists, not before.

Does the mask declaration apply to inner layers on a multilayer heavy copper board?

No — mask is on the two outer layers. The thing to watch is that the mask requirement must be written against the outer layer copper weight, which on a mixed-weight board is not necessarily the weight the RFQ headline quotes.

Can I send the zone map after the quote?

You can, but you lose the point of sending it. Mask zoning can change the manufacturability answer and the finish choice, so a quote issued without it is a quote against assumptions. Send it with the RFQ and keep it in the same frozen revision as the finish line.

Related links

• Heavy Copper PCB
• Manufacturing Capabilities