HDI PCB Cost Drivers: Where Quotes Differ and What You Can Relax

When three HDI quotations arrive with large gaps between them, the easiest conclusion is that someone quoted high. In HDI work that conclusion is usually wrong. The gap is rarely three prices for the same thing. It is three different structural assumptions, three different yield expectations and three different sets of order conditions, each compressed into a single number. Choosing the lowest figure at that point means paying a deposit on a technical solution nobody has confirmed yet.

This article does not rank suppliers and states no PCB168 price, layer-count limit, minimum line width or yield figure. It addresses one procurement problem: how to decompose an HDI quotation into cost drivers that can be discussed, and how to separate the items fixed by function from the items that are only design habit or accumulated margin and can therefore be restructured without changing how the circuit works.

1. Separate the cost baseline from the price

A price is a commercial result produced under one set of assumptions. The cost baseline is the assumptions themselves: construction, material, process route, inspection scope, quantity and lead time. Two quotations are comparable only when that baseline is comparable.

In practice buyers often freeze only part of it. Gerber data and a quantity are supplied, the stackup is left to the supplier, an impedance requirement sits in a corner of the drawing, the inspection class is unstated and the finish is described as "standard". Each supplier then fills those gaps in the way that suits its own process and carries the least risk, and the prices diverge accordingly. Comparable prices require comparable assumptions. For how to organise that package, see the HDI PCB quote package checklist. This article deals with what happens after the package is complete: which of its contents are pushing the price up.

2. Layer count and lamination cycles: steps, not a slope

Buyers frequently model cost as rising linearly with layer count. HDI construction does not behave that way. The real steps come from lamination cycles. Each additional sequential lamination means the whole set of cores passes through another complete round of registration, pressing, drilling, plating and inspection, and a failure in any of those rounds carries away the investment in every operation before it.

So "ten layers" is not one cost point. A construction completed in a single lamination and a construction requiring two or three sequential laminations sit at different levels. The useful procurement question is therefore not "how many layers" but "how many lamination cycles does this stackup need, and why". If some interconnect requirements can be routed to fall within a single lamination stage, the saving is usually far larger than removing one or two layers. The multi-layer PCB stackup guide gives background on stackup construction, but the lamination-cycle count must come from the supplier's actual process route.

3. Microvia structure: stacked, staggered and layer span

Microvia cost is not only a matter of count. It comes from structural relationships. Stacked vias require the upper and lower positions to stay registered through multiple operations and require the lower via to be reliably filled first. Staggered vias relax that coupling between registration and filling but consume more routing area. Which option is more economical depends on fan-out density, layer count and the supplier's process practice. There is no universal answer.

Layer span matters just as much. A microvia crossing a single layer and an interconnect required to cross several layers follow different manufacturing routes, and the second often needs an extra lamination stage or a different combination of via types. The effective buyer action is to list every via group in the RFQ with its start and stop layers, type, whether it is filled and whether it is capped, rather than writing "HDI with blind and buried vias". For via concepts see the PCB via design types guide; for the process differences see HDI PCB manufacturing process.

4. Line width and spacing: from capability to yield cost

The cost mechanism behind fine lines is widely misread. In most cases the question is not whether a supplier can achieve a given line width, but how much batch yield falls at that width and how much scrap allowance the supplier must reserve for it. That allowance ends up inside the unit price.

The practical consequence for buyers is this: if only the BGA fan-out area needs the finest geometry, that requirement should not be written as a board-wide rule. Distinguishing a local minimum from a board-wide default often changes the quotation structure noticeably while leaving circuit function untouched. A second common free saving is to re-examine whether the copper weight and line width combination is necessary at all. Heavier foil makes fine features harder to form, so if a layer does not need extra current-carrying capacity, returning it to a conventional copper weight relaxes the difficulty of the entire layer.

5. Aspect ratio, hole density and drilling load

Hole cost is the sum of three things: drilling time, process difficulty and inspection burden. The higher the aspect ratio of a mechanical hole, the harder it is to guarantee uniform plating, and the more conservative the parameters and the more in-process inspection the supplier needs. Laser via count translates directly into machine time, and the number of holes in a dense fan-out region is often far higher than a buyer's intuition suggests.

Two items are worth reviewing. First, whether large numbers of unnecessary vias exist, such as redundant thermal via arrays or leftover holes from a superseded routing revision. Second, whether the minimum hole size has been pushed uniformly to the strictest value across the board. The limits for hole size and aspect ratio must be confirmed by the supplier against its real process; a buyer should not assume them.

6. Panel utilization and outline dimensions

A buyer pays for one board. A supplier costs a production panel. Outline dimensions, array configuration, process border width and the permitted rotation together determine how many boards come off a panel, and the difference in utilization goes straight into the unit price.

This is one of the rare procurement items where a small change produces a clear return. Within the limits allowed by the circuit and the enclosure, adjusting the outline slightly, relaxing rotation restrictions, or accepting the supplier's proposed array often changes no function at all. The method is to state the variable range of the outline constraints in the RFQ and ask the supplier to propose an array, rather than locking a single array drawing. Where assembly imposes its own requirements, confirm tooling borders and fiducial needs together with the PCB assembly side, so that saving panel cost does not add assembly cost.

7. Material, finish, impedance and test requirements

Material grade, surface finish, impedance control and test scope are each separately negotiable cost items, and they are also the items most often inflated by inherited defaults.

• Material: the need for a high-performance laminate should follow the actual signal and thermal requirements. If only part of the board carries that requirement, ask the supplier to assess whether a hybrid construction is more economical.
• Finish: this should follow the assembly process, storage time and contact function, not a template copied from an earlier project. The PCB surface finish comparison sets out the selection dimensions.
• Impedance: state the controlled net groups, target values and tolerances explicitly. Tightening every tolerance to the strictest value raises material, stackup and test cost simultaneously.
• Test and inspection: electrical test coverage, inspection class, and whether cross-section or impedance reports are required should be set by project risk rather than defaulted to the maximum. See PCB quality inspection methods for the inspection dimensions.

8. Order variables: quantity, lead time, NRE and validity

Beyond construction, the commercial conditions are also inside the price: how quantity interacts with the panel array, whether the build is expedited, how one-off engineering and test-fixture charges are amortised, minimum order quantity, and how quotation validity and raw-material price movement are handled.

The unit-price curve for one construction across different quantity breaks often shifts a project budget more than any structural concession. Asking for tiered pricing in the RFQ, and requiring the supplier to mark which charges are one-off and which vary with quantity, is the most direct route to cost transparency.

9. A negotiable-specification decision table

Sorting every specification into three classes turns the conversation from price pressure into restructuring:

• Function-critical, not negotiable: items set by the circuit, signal integrity, current-carrying need or safety, such as impedance requirements on critical nets, necessary via interconnects and safety spacing.
• Carries margin, worth assessing: a board-wide minimum line width, a minimum hole size pushed to the strictest value, uniformly tightened impedance tolerances, a finish beyond what assembly needs, and inspection scope defaulted to every available item.
• Unrelated to function, relax first: outline adjustment margin, rotation restrictions, unnecessary via arrays, process border width inherited from an old template, and lead time that can be extended.

Record the reasoning and the decision owner for each entry. Even when nothing is finally relaxed, the cost discussion leaves behind a reusable basis, so the next revision does not start from zero.

10. Writing an RFQ that makes cost drivers visible

Ask suppliers to separate structure-related cost, engineering and tooling charges, test charges and quantity-related cost. For every specification relaxation they propose, require the reasoning and the affected scope alongside it. State the quotation assumptions explicitly: which data revision, how many lamination cycles, which array, which inspection class, and which reports ship with the boards.

Any relaxation must go through formal change control, be confirmed by design and quality, and be reflected in updated controlled documents. An email agreement is not a change record. Once the assessment is complete, submit the frozen package and the tiered-pricing request through the quotation page, and use the HDI PCB product page and the capabilities overview to confirm structural feasibility. Negotiating room usually lies in this step, not in a final round of haggling.

FAQ

Why can HDI quotations for the same Gerber set differ by several times? They are usually not different prices for the same thing. The gap normally comes from different stackup and lamination-cycle assumptions, different readings of the microvia structure, different inspection and test scope, and different array and quantity assumptions. Align the assumptions before comparing prices.

Does reducing layer count always reduce price? No. If removing layers raises routing density and forces finer line widths or more sequential laminations, total cost can rise. The step change is in lamination cycles, not layer count itself.

Are stacked or staggered microvias cheaper? There is no general answer. It depends on fan-out density, layer count, available routing area and the supplier's process route. List both as discussable options in the RFQ and let the supplier report the impact from its actual process.

Is it safer to specify the strictest line width and hole size everywhere? That lifts the cost of the whole board to the level of its most demanding local requirement and usually lowers batch yield. Distinguishing local minimums from board-wide defaults is the better approach.

Can I just ask the supplier how to make it cheaper? You can ask for relaxation proposals with reasoning and affected scope. Whether to adopt them must be confirmed by your design and quality owners and reflected in controlled documents through formal change control.

Can one-off charges be removed from a quotation? Engineering and tooling charges usually correspond to real work. It is more productive to clarify how they are amortised, whether they are waived on repeat orders, and who owns the tooling, than to ask for their removal.